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19-0602; Rev 2; 1/07
KIT ATION EVALU ILABLE AVA
Graphics Video Sync Adder/Extractor
General Description Features
o 3-Wire RBG to 5-Wire RBGHV Interface o Supports VGA-to-UXGA Resolution o Low Offset Voltage (1mV) o 180MHz Large-Signal Bandwidth
MAX9539/MAX9540
The MAX9539/MAX9540 chipset provides a 3-wire (RGB) interface for 5-wire (RGBHV) video by adding and extracting the H, V, and composite sync from the graphics video signals. This chipset eliminates the problem of sync-to-video timing (skew errors) in a 5wire interface, while reducing the number of channels required to transport video signals. The MAX9539 mixes the H and V sync signals and adds them to create a 3-wire interface from a 5-wire (RGBHV) input. The MAX9540 recovers the H and V sync signals to create a 5-wire (RGBHV) interface from the 3-wire input. The MAX9540 also provides a composite sync output. The chipset includes the MAX9539 sync adder and the MAX9540 sync extractor with 180MHz large-signal bandwidths to address display resolutions up to 1600 x 1200 at 85Hz for VGA-to-UXGA applications. Both devices feature a DC restore function, which virtually eliminates any changes in black level. The chipset uses a proprietary H and V sync addition/extraction scheme (true sync) to minimize skew errors. The MAX9539/MAX9540 are available in 28-pin TSSOP packages and are specified over the extended -40C to +85C temperature range.
Ordering Information
PART MAX9539EUI+* MAX9539EUI MAX9540EUI+* MAX9540EUI PINPACKAGE 28 TSSOP 28 TSSOP 28 TSSOP 28 TSSOP PKG CODE U28-3 U28-3 U28-3 U28-3 DESCRIPTION Sync Adder Sync Adder Sync Extractor Sync Extractor
Note: All devices are specified over the -40C to +85C operating temperature range. +Denotes lead-free package. *Future product--contact factory for availability. Pin Configurations appear at end of data sheet.
Applications
Enterprise Class (Blade) Servers Laptop PCs Web Appliances Keyboard-Video-Mouse (KVM)
Chipset Diagram
H H V R G B V R G B R G B
MAX9539
MAX9540
C R G B
________________________________________________________________ Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim's website at www.maxim-ic.com.
Graphics Video Sync Adder/Extractor MAX9539/MAX9540
ABSOLUTE MAXIMUM RATINGS
VCC to GND ..............................................................-0.3V to +6V VEE to GND...............................................................-6V to +0.3V IN_R, IN_G, IN_B, REST_R, REST_G, REST_B........................................(VEE - 0.3V) to (VCC + 0.3V) OUT_R, OUT_G, OUT_B Short Circuit to GND (Note 1) .....................................................Continuous OUT_R, OUT_G, OUT_B Short Circuit to VCC .......................................................................................5s MAX9539: HSYNC, VSYNC, SP_H, SP_V ................ -0.3V to (VCC + 0.3V) MAX9540: HSYNC, CSYNC, VSYNC Short Circuit to GND .....Continuous HSYNC, CSYNC, VSYNC Short Circuit to VCC .................1min SP_C, SP_V, SP_H .................................-0.3V to (VCC + 0.3V) Note 1: Continuous power dissipation rating must also be observed.
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Continuous Power Dissipation (TA = +70C) 28-Pin TSSOP (U28-3) Single-Layer Board (derate 13mW/C above +70C) ................................1039mW 28-Pin TSSOP (U28-3) Multilayer Board (derate 14.3mW/C above +70C) ...............................1143mW Operating Temperature .......................................-40C to +85C Junction Temperature ......................................................+150C Storage Temperature Range .............................-65C to +150C Lead Temperature (soldering, 10s) .................................+300C
MAX9539 DC ELECTRICAL CHARACTERISTICS
(VCC = +5V, VEE = -5V, GND = 0V, RL = 150 to GND, TA = -40C to +85C, unless otherwise specified. Typical values are at TA = +25C.) (Notes 2 and 3)
PARAMETER Supply Voltage Range Quiescent Supply Current Input Voltage Range DC-Restore Input Voltage Range SYMBOL VCC VEE ICC IEE VIN VIN_RESTORE DCRR (VOS / IB RIN VSYNC VOS TCVOS (VOS / TA) G G PSRR VOS / (VCC - VEE) H or V sync is active VIN_RESTORE_ = 0V, TA = +25oC (Note 4) TA = -40oC to +85oC VIN = 0 to +1V R to G to B +1.95 -2.65 CONDITIONS Guaranteed by PSRR test Guaranteed by PSRR test RL = RL = Inferred from voltage gain test Inferred from output DC-Restore Rejection Ratio test VIN_RESTORE = -0.3V to +0.3V 0 -0.30 MIN 4.5 -5.5 61 55 TYP MAX 5.5 -4.5 90 75 1 +0.30 UNITS V mA V V
DC-Restore Rejection Ratio Input Bias Current Input Resistance Output Sync Amplitude Output Offset Voltage Temperature Coefficient of Output Offset Voltage Voltage Gain Gain Matching Gain Linearity Power-Supply Rejection Ratio
VIN_RESTORE)
28
50 2 400 -2.35 1 -24 +2 1 0.02 +2.05 2 -2.05 8 30
dB A k V mV V/C V/V % % dB
VCC, VEE = 4.5V to 5.5V
50
70
2
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Graphics Video Sync Adder/Extractor
MAX9539 DC ELECTRICAL CHARACTERISTICS (continued)
(VCC = +5V, VEE = -5V, GND = 0V, RL = 150 to GND, TA = -40C to +85C, unless otherwise specified. Typical values are at TA = +25C.) (Notes 2 and 3)
PARAMETER HSYNC, VSYNC INPUTS High Input Voltage Low Input Voltage High Input Current Low Input Current SP_H, SP_V INPUTS High Input Voltage Low Input Voltage High Input Current Low Input Current REST_R, REST_B, REST_G INPUTS Hold-Mode Droop Current IDROOP 2 nA VIH VIL IIH IIL VI = 5V VI = 0V 0.1 1 2 0.8 20 20 V V A A VIH VIL IIH IIL VI = 5V VI = 0V 10 2.5 2 0.8 60 V V A A SYMBOL CONDITIONS MIN TYP MAX UNITS
MAX9539/MAX9540
MAX9539 AC ELECTRICAL CHARACTERISTICS
(VCC = +5V, VEE = -5V, GND = 0V, RL = 150 to GND, TA = -40C to +85C, unless otherwise specified. Typical values are at TA = +25C.)
PARAMETER Large-Signal Bandwidth Slew Rate Channel-to-Channel Crosstalk Settling Time Input Voltage-Noise Density Input Current-Noise Density Sync Timing Delay Channel-to-Channel Sync Timing Skew Sync Edge Jitter Line Droop Field Tilt Sync Frequency Range fH fV SYMBOL LSBW SR XTALK tS en in tD (tD) tJITTER f = 50kHz f = 60Hz H sync V sync VOUT = 2VP-P VOUT = 2VP-P VOUT = 2VP-P at 10MHz VOUT = 2VP-P to 0.1% f = 100kHz f = 100kHz H sync only (Note 5) H sync only (Note 5) CONDITIONS MIN TYP 180 900 -60 15 30 12 -20 1 200 0.01 0.04 15 to 150 40 to 100 MAX UNITS MHz V/s dB ns nV/Hz pA/Hz ns ns psP-P % % kHz Hz
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Graphics Video Sync Adder/Extractor MAX9539/MAX9540
MAX9540 DC ELECTRICAL CHARACTERISTICS
(VCC = +5V, VEE = -5V, GND = 0V, RL = 150 to GND, TA = -40C to +85C, unless otherwise specified. Typical values are at TA = +25C.) (Notes 2 and 3)
PARAMETER Supply Voltage Range Quiescent Supply Current Input Voltage Range DC-Restore Input Voltage Range SYMBOL VCC VEE ICC IEE VIN VIN_RESTORE DCRR (VOS / IB RIN VBLACK VOS TCVOS (VOS /TA) G G PSRR VOS / (VCC - VEE) H or V sync is active: VIN < -1V VIN_RESTORE_ = 0V, TA = +25oC (Note 4) TA = -40oC to +85oC VIN = 0 to +1V R to G to B +1.95 CONDITIONS Guaranteed by PSRR test Guaranteed by PSRR test RL = RL = Inferred from voltage gain test Inferred from DC-Restore Rejection Ratio test VIN_RESTORE = -0.3V to +0.3V 0 -0.30 MIN 4.5 -5.5 61 54 TYP MAX 5.5 -4.5 90 75 1 +0.30 UNITS V mA V V
DC-Restore Rejection Ratio Input Bias Current Input Resistance Output Black Level Output Offset Voltage Temperature Coefficient of Output Offset Voltage Voltage Gain Gain Matching Gain Linearity Power-Supply Rejection Ratio SP_H, SP_V, SP_C INPUTS High Input Voltage Low Input Voltage High Input Current Low Input Current
VIN_RESTORE)
28
50 2 400 1 1 -24 +2 1 0.02 +2.05 2 16 8 30
dB A k mV mV V/C V/V % % dB
VCC, VEE = 4.5V to 5.5V
50
70
VIH VIL IIH IIL IDROOP VOH VOL IOH (source) = +8mA IOL (sink) = -8mA VI = 5V VI = 0V
2 0.8 0.01 1 2 2.4 0.5 20 20
V V A A nA V V
REST_R, REST_G, REST_B INPUTS Hold-Mode Droop Current HSYNC, VSYNC, CSYNC OUTPUTS High Voltage Level Low Voltage Level
4
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Graphics Video Sync Adder/Extractor
MAX9540 AC ELECTRICAL CHARACTERISTICS
(VCC = +5V, VEE = -5V, GND = 0V, RL = 150 to GND, TA = -40C to +85C, unless otherwise specified. Typical values are at TA = +25C.)
PARAMETER Large-Signal Bandwidth Slew Rate Channel-to-Channel Crosstalk Settling Time Input Voltage-Noise Density Input Current-Noise Density Sync Timing Delay Sync Timing Skew Sync Edge Jitter Line Droop Field Tilt Sync Frequency Range fH fV SYMBOL LSBW SR XTALK tS en in tD (tD) tJITTER f = 50kHz f = 60Hz H sync V sync VOUT = 2VP-P VOUT = 2VP-P VOUT = 2VP-P at 10MHz VOUT = 2VP-P to 0.1% f = 100kHz f = 100kHz H sync only (Note 5) H sync only (Note 5) CONDITIONS MIN TYP 180 900 -60 15 30 12 -10 1 200 0.01 0.04 15 to 150 40 to 100 MAX UNITS MHz V/s dB ns nV/Hz pA/Hz ns ns psP-P % % kHz Hz
MAX9539/MAX9540
Note 2: Note 3: Note 4: Note 5:
All devices are 100% production tested at TA = +25C. Specifications over temperature limits are guaranteed by design. DC restore is not active. HSYNC and VSYNC are not applied. REST_R, REST_G, and REST_B are grounded. DC restore is active. REST_R, REST_G, and REST_B are bypassed with 1nF to ground. The sync timing error is measured as follows: The input signals are measured from the falling edge of H sync/V sync to the start of active video, called t1. The output signal is then measured from the falling edge of H sync/V sync to the start of active video, called t2. All measurements are at the 50% points as shown in Figure 1.
Typical Operating Characteristics
(TA = +25C, VCC = +5V, VEE = -5V, GND = 0V, RL = 150 to GND, unless otherwise noted.)
LARGE-SIGNAL FREQUENCY RESPONSE (MAX9539)
MAX9539 toc01
LARGE-SIGNAL FREQUENCY RESPONSE (MAX9540)
2 1 0 GAIN (dB) -1 -2 -3 -4 -5 -6 -7 GAIN (dB) IN_ = 1VP-P AV = +2V/V
MAX9539 toc02
LARGE-SIGNAL GAIN FLATNESS vs. FREQUENCY (MAX9539)
0.2 0.1 0 -0.1 -0.2 -0.3 -0.4 -0.5 -0.6 -0.7
MAX9539 toc03
3 2 1 0 GAIN (dB) -1 -2 -3 -4 -5 -6 -7 1 10 100 IN_ = 1VP-P AV = +2V/V
3
0.3
1000
1
10
100
1000
1
10
100
1000
FREQUENCY (MHz)
FREQUENCY (MHz)
FREQUENCY (MHz)
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Graphics Video Sync Adder/Extractor MAX9539/MAX9540
Typical Operating Characteristics (continued)
(TA = +25C, VCC = +5V, VEE = -5V, GND = 0V, RL = 150 to GND, unless otherwise noted.)
LARGE-SIGNAL GAIN FLATNESS vs. FREQUENCY (MAX9540)
0.2 0.1 0 GAIN (dB) GAIN (dB) -0.1 -0.2 -0.3 -0.4 -0.5 -0.6 -0.7 1 10 100 1000 FREQUENCY (MHz) -60 -70 0.1 1 10 FREQUENCY (MHz) 100 1000 -60 -70 0.1 1 10 FREQUENCY (MHz) 100 1000 IN_ = 1VP-P AV = +2V/ V
MAX9539 toc03
POWER-SUPPLY REJECTION RATIO vs. FREQUENCY (MAX9539)
MAX9539 toc05
POWER-SUPPLY REJECTION RATIO vs. FREQUENCY (MAX9540)
MAX9539 toc06
0.3
0 -10 -20
0 -10 -20 GAIN (dB)
-30 -40
PSRR-
PSRR-30 -40 -50 PSRR+
PSRR+ -50
SUPPLY CURRENT vs. TEMPERATURE (MAX9539)
MAX9539 toc07
SUPPLY CURRENT vs. TEMPERATURE (MAX9540)
64 62 SUPPLY CURRENT (mA) 60 58 56 54 52 50 IEE ICC
MAX9539 toc08
64 62 SUPPLY CURRENT (mA) 60 58 56 54 52 50 -50 -25 0 25 50 75 IEE ICC
100
-50
-25
0
25
50
75
100
TEMPERATURE (C)
TEMPERATURE (C)
OUTPUT vs. INPUT (MAX9539)
MAX9539 toc09
OUTPUT vs. INPUT (MAX9540)
MAX9539 toc10
IN_R 1V/div
IN_R 1V/div
HSYNC 5V/div OUT_R 2V/div
OUT_R 1V/div
HSYNC 5V/div
2s/div
2s/div
6
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Graphics Video Sync Adder/Extractor
MAX9539 Pin Description
PIN 1 2, 7, 12 3 4, 9, 10, 14, 15, 20, 21, 22, 25 5 6 8 11 13 16 17 18 19 23 24 26 27 28 NAME IN_R GND REST_R N.C. I.C. IN_G REST_G IN_B REST_B VSYNC SP_V OUT_B VEE OUT_G VCC HSYNC SP_H OUT_R Red Video Input Ground Red DC Restore. Connect a 1nF capacitor from REST_R to GND. No Connection. Not internally connected. Internally Connected. For best performance, connect this pin to GND. Green Video Input Green DC Restore. Connect a 1nF capacitor from REST_G to GND. Blue Video Input Blue DC Restore. Connect a 1nF capacitor from REST_B to GND. Vertical Sync Input Vertical Sync Polarity Input Blue Output with Vertical Sync Negative Power-Supply Input. Bypass with a 0.1F capacitor to GND. Green Output with Composite Sync. Positive Power-Supply Input. Bypass with a 0.1F capacitor to GND. Horizontal Sync Input Horizontal Sync Polarity Input Red Output with Horizontal Sync FUNCTION
MAX9539/MAX9540
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Graphics Video Sync Adder/Extractor MAX9539/MAX9540
MAX9540 Pin Description
PIN 1 2, 7, 12 3 4, 9, 10, 14, 15, 20, 25 5 6 8 11 13 16 17 18 19 21 22 23 24 26 27 28 NAME IN_R GND REST_R N.C. I.C. IN_G REST_G IN_B REST_B VSYNC SP_V OUT_B VEE CSYNC SP_C OUT_G VCC HSYNC SP_H OUT_R Red Video Input with Horizontal Sync Ground Red DC Restore. Connect a 1nF capacitor from REST_R to GND. No Connection. Not internally connected. Internally Connected. For best performance, connect this pin to GND. Green Video Input with Composite Sync Green DC Restore. Connect a 1nF capacitor from REST_G to GND. Blue Video Input with Vertical Sync Blue DC Restore. Connect a 1nF capacitor from REST_B to GND. Vertical Sync Output Vertical Sync Polarity Input Blue Video Output Negative Power-Supply Input. Bypass with a 0.1F capacitor to GND. Composite Sync Output Composite Sync Polarity Input Green Video Output Positive Power-Supply Input. Bypass with a 0.1F capacitor to GND. Horizontal Sync Output Horizontal Sync Polarity Input Red Video Output FUNCTION
Detailed Description
The MAX9539/MAX9540 chipset provides a 3-wire (RGB) interface for 5-wire (RGBHV) video by adding and extracting the H, V, and composite sync from the graphics video signals. This chipset eliminates the problem of sync-to-video timing (skew errors) in a 5wire interface, while reducing the number of channels required when transporting video signals. The MAX9539 mixes the H and V sync signals and adds them to create a 3-wire interface from a 5-wire (RGBHV) input. The MAX9540 recovers the H and V sync signals to create a 5-wire (RGBHV) interface from the 3-wire input. The MAX9540 also provides a composite sync output. The chipset includes the MAX9539 sync adder and the MAX9540 sync extractor with 180MHz large-signal bandwidths to address display resolutions up to 1600 x 1200 at 85Hz for VGA-to-UXGA applications. Both devices feature a DC-restore function, which virtually eliminates any changes in black level. The chipset uses a proprietary H and V sync addition/extraction scheme (true sync) to minimize skew errors.
8
MAX9539 Sync Adder
The MAX9539 mixes the H and V sync signals and adds them to create a 3-wire interface from a 5-wire (RGBHV) input. Sync signals are added to the input video signals. Horizontal sync is added to red video, vertical sync is added to blue video, and composite sync is added to green video. Composite sync is the XOR function between H sync and V sync and is internally generated by the MAX9539. The sync level of the video outputs is -2.4V. The DC-restore function removes any DC offset (V IN_RESTORE) in the RGB video inputs and sets the output black level to 0V at the back porch of the H sync. Therefore, the output black level is set to 0V at the beginning of every line. Figure 2 illustrates the functionality of the MAX9539. In this example, the sync signals are of positive polarity.
MAX9540 Sync Extractor
The MAX9540 recovers the H and V sync signals to create a 5-wire (RGBHV) interface from the 3-wire input. The output video signals are obtained by removing the sync pulses of the input video. The sync outputs correspond to the sync pulses of the input video: horizontal sync is
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Graphics Video Sync Adder/Extractor
obtained from the red input, vertical sync is obtained from the blue input, and composite sync is obtained from the green input. Like the MAX9539, the DC-restore function removes any DC offset in the RGB video inputs and sets the output black levels to 0V. This happens at the back porch (trailing edge) of the sync pulse. Figure 3 illustrates the functionality of the MAX9540. In this example, the sync signals are of positive polarity.
MAX9539/MAX9540
SYNC TIMING DELAY (tD) = t1 - t2
t1
DC Restore
The MAX9539/MAX9540 DC-restore function removes the input signal DC level and restores 0V for the black level of the output video signal. 1nF restore capacitors are needed for the sample-and-hold circuitry at REST_R, REST_G, and REST_B. A value less than 0.5nF can cause AC instability in the sample-and-hold circuitry. A value higher than 2nF increases the settling time of the sample-and-hold circuitry, shifting the output black level from 0V.
VIDEO
SYNC
t2 VIDEO WITH SYNC
Sync Polarity
Sync polarity refers to the idle state and pulse amplitude of the sync pulse. A sync pulse that idles low and pulses high is referred to as a positive sync pulse. A sync pulse that idles high and pulses low is referred to as a negative sync pulse as seen in Figure 4. To accommodate positive and negative sync input signals, the MAX9539/MAX9540 have vertical and horizontal sync polarity inputs (SP_V and SP_H). Drive SP_V or SP_H high for positive sync polarity. Drive SP_V or SP_H low for negative sync polarity. The MAX9540 also has a composite polarity input (SP_C). Drive SP_C high for positive sync polarity or drive SP_C low for negative sync polarity (Table 1).
Figure 1. Sync Timing Delay (tD) = t1 - t2
Table 1. Sync Polarity Table
INPUT LOGIC VALUE 1 0 SP_V Positive sync Negative sync SP_H Positive sync Negative sync SP_C (MAX9540) Positive sync Negative sync
Layout and Power-Supply Bypassing
The MAX9539/MAX9540 have an extremely high bandwidth and require careful board layout. For best performance use constant-impedance microstrip or stripline techniques. To realize the full AC performance of these high-speed amplifiers, pay careful attention to power-supply bypassing and board layout. The PC board should have at least two layers: a signal and power layer on one side, and a large, low-impedance ground plane on the other side. The ground plane should be as free of voids as possible. With multilayer boards, locate the ground plane on a layer that incorporates no signal or power traces. Observe the following guidelines when designing the board regardless of whether or not a constant-impedance board is used. 1) Do not use wire-wrap boards or breadboards.
2) Do not use IC sockets; they increase parasitic capacitance and inductance. 3) Keep lines as short and as straight as possible. Do not make 90 turns; round all corners. 4) Observe high-frequency bypassing techniques to maintain the amplifier's accuracy and stability. 5) Use surface-mount components. They generally have shorter bodies and lower parasitic reactance, yielding better high-frequency performance than through-hole components.
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Graphics Video Sync Adder/Extractor MAX9539/MAX9540
VIDEO INPUT (IN_)
0.7V 0V
HOR. SYNC (HSYNC)
5V 0V
VER. SYNC (VSYNC)
5V 0V
RED OUTPUT (OUT_R)
1.4V 0V -2.4V
BLUE OUTPUT (OUT_B)
1.4V 0V -2.4V
GREEN OUTPUT (OUT_G)
1.4V 0V -2.4V
Figure 2. MAX9539 Input and Output Functionality
VIDEO WITH SYNC (IN_)
POSITIVE SYNC
0.7V -2.4V
+5V
VIDEO OUTPUT (OUT_R/B/G)
0V
1.4V 0V
NEGATIVE SYNC +5V
SYNC OUTPUT (_SYNC)
5V 0V
0V
Figure 3. MAX9540 Input and Output Functionality
Figure 4. Sync Pulse Polarity
The bypass capacitors should include a 0.1F ceramic surface-mount capacitor between each supply pin and the ground plane, located as close to the package as possible. Optionally, place a 10F tantalum capacitor at the power-supply pins' points of entry to the PC board to ensure the integrity of incoming supplies. The power-supply trace should lead directly from the tanta10
lum capacitor to the VCC and VEE pins. To minimize parasitic inductance, keep PC traces short and use surface-mount components. Use surface-mount resistors for input termination and output back termination. Place the termination resistors as close to the IC as possible.
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Graphics Video Sync Adder/Extractor
Functional Diagrams
* OPTIONAL BULK CAPACITANCE +5V
MAX9539/MAX9540
0.1F VCC 24
10F*
MAX9539
IN_R 1 x2 28 OUT_R
DC RESTORE REST_R 1nF IN_G 6 x2 23 OUT_G 3
DC RESTORE REST_G 1nF IN_B 11 x2 18 OUT_B 8
DC RESTORE REST_B 1nF VSYNC HSYNC 16 26 H/V SYNC LOGIC 13
19 17 27 SP_V SP_H 0.1F VEE 10F*
2, 5, 7, 12 GND
-5V
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11
Graphics Video Sync Adder/Extractor MAX9539/MAX9540
Functional Diagrams (continued)
* OPTIONAL BULK CAPACITANCE +5V
0.1F VCC 24
10F*
MAX9540
IN_R 1 x2 28 OUT_R
DC RESTORE REST_R 3 1nF IN_G 6 x2 23 OUT_G
DC RESTORE REST_G 1nF IN_B 11 x2 18 OUT_B 8
DC RESTORE REST_B 1nF SP_V SP_C SP_H 13 17 22 27 H/V/C SYNC LOGIC 16 21 26 VSYNC CSYNC HSYNC
2, 5, 7, 12 GND 0.1F
19 VEE 10F*
-5V
12
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Graphics Video Sync Adder/Extractor
Typical Application Diagram
BLADE 1 H V R R 75 75 BACKPLANE
MAX9539/MAX9540
MAX9539
G B
G
B
75
PRIOR BLADE
MAX4027
+700mV
75 75
0V -1.2V BLADE 2
MAX4027
75
H V R G B 75
MAX9540
75
75 MANAGEMENT MODULE
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13
Graphics Video Sync Adder/Extractor MAX9539/MAX9540
Pin Configurations
TOP VIEW
IN_R 1 GND 2 REST_R 3 N.C. 4 I.C. 5 IN_G 6 GND 7 REST_G 8 N.C. 9 N.C. 10 IN_B 11 GND 12 REST_B 13 N.C. 14 28 OUT_R 27 SP_H 26 HSYNC
TOP VIEW
IN_R 1 GND 2 REST_R 3 N.C. 4 I.C. 5 IN_G 6 GND 7 REST_G 8 N.C. 9 N.C. 10 IN_B 11 GND 12 REST_B 13 N.C. 14 28 OUT_R 27 SP_H 26 HSYNC
MAX9539
25 N.C. 24 VCC 23 OUT_G 22 N.C. 21 N.C. 20 N.C. 19 VEE 18 OUT_B 17 SP_V 16 VSYNC 15 N.C.
MAX9540
25 N.C. 24 VCC 23 OUT_G 22 SP_C 21 CSYNC 20 N.C. 19 VEE 18 OUT_B 17 SP_V 16 VSYNC 15 N.C.
TSSOP
TSSOP
Chip Information
PROCESS: Bipolar
14
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Graphics Video Sync Adder/Extractor
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.)
TSSOP4.40mm.EPS
PACKAGE OUTLINE, TSSOP 4.40mm BODY
MAX9539/MAX9540
21-0066
I
1 1
Revision History
Pages changed at Rev 2: 1, 2, 4, 15
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 15 (c) 2007 Maxim Integrated Products is a registered trademark of Maxim Integrated Products, Inc.
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